Garbled Circuits With Sublinear Evaluator.
Abida HaqueDavid HeathVladimir KolesnikovSteve LuRafail OstrovskyAkash ShahPublished in: IACR Cryptol. ePrint Arch. (2022)
Keyphrases
- tunnel diode
- analog circuits
- circuit design
- space complexity
- delay insensitive
- evaluation process
- high speed
- decision trees
- logic circuits
- analog vlsi
- lateral inhibition
- digital libraries
- lower bound
- multi agent systems
- real world
- image sequences
- digital circuits
- clustering algorithm
- asynchronous circuits
- information systems
- learning algorithm