7.6 1GB/s 2Tb NAND flash multi-chip package with frequency-boosting interface chip.
Hyun-Jin KimJeong-Don LimJang-Woo LeeDae-Hoon NaJoon-Ho ShinChae-Hoon KimSeungwoo YuJi-Yeon ShinSeon-Kyoo LeeDevraj RajagopalSang-Tae KimKyeong-Tae KangJeong-Joon ParkYongjin KwonMin-Jae LeeSunghoon KimSeunghoon ShinHyunggon KimJin-Tae KimKi-Sung KimHan-Sung JooChan-Jin ParkJae-Hwan KimMan-Joong LeeDo-Kook KimHyang-Ja YangDae-Seok ByeonKi-Tae ParkKyehyun KyungJeong-Hyuk ChoiPublished in: ISSCC (2015)
Keyphrases
- high speed
- low cost
- high density
- low power consumption
- analog vlsi
- programmable logic
- low power
- phase locked loop
- physical design
- single chip
- circuit design
- user interface
- vlsi implementation
- real time
- machine learning
- functional verification
- multi class
- data structure
- feature selection
- vlsi design
- learning algorithm
- random access memory
- neural network