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2-GHz 2×VDD 28-nm CMOS Digital Output Buffer with Slew Rate Auto-Adjustment Against Process and Voltage Variations.

Chua-Chin WangZong-You HouYu-Lin DengU. Fat ChioWei Wang
Published in: J. Circuits Syst. Comput. (2020)
Keyphrases
  • power consumption
  • high speed
  • power supply
  • neural network