Charge recycling for power reduction in FPGA interconnect.

Safeen Huda Jason Helge Anderson Hirotaka Tamura

Published in: FPL (2013)

Keyphrases

power reduction
power dissipation
power consumption
low power
high speed
power saving
digital signal processing
low cost
energy saving
clock frequency
computer vision
fine grained
energy efficiency
data flow
finite state machines
design methodology