Scheduling tests for low power built-in self-test.
Tobias SchüleAlbrecht P. StroelePublished in: ISCAS (5) (2001)
Keyphrases
- low power
- power consumption
- low cost
- high speed
- built in self test
- single chip
- scheduling problem
- high power
- scheduling algorithm
- digital signal processing
- vlsi architecture
- wireless transmission
- logic circuits
- cmos technology
- low power consumption
- vlsi circuits
- power saving
- image sensor
- resource constraints
- integrated circuit
- energy dissipation
- mixed signal
- hardware and software
- signal processor
- energy consumption