Transparent Runtime Migration of Loop-Based Traces of Processor Instructions to Reconfigurable Processing Units.
João BispoNuno Miguel Cardanha PaulinoJoão M. P. CardosoJoão Canas FerreiraPublished in: Int. J. Reconfigurable Comput. (2013)
Keyphrases
- processing units
- parallel processing
- high end
- computing systems
- parallel computing
- digital signal
- general purpose
- systolic array
- processor core
- graphics processing units
- parallel programming
- memory access
- parallel architectures
- hardware implementation
- field programmable gate array
- supervised learning
- parallel architecture
- multi core processors
- instruction set
- functional units
- multiple types
- context aware
- instruction set architecture