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Replica Bit-Line Technique for Internal Refresh in Logic-Compatible Gain-Cell Embedded DRAM.

Odem HarelYarden NachumRobert Giterman
Published in: Microelectron. J. (2020)
Keyphrases
  • random access memory
  • embedded dram
  • design considerations
  • low voltage
  • load balancing
  • dynamic random access memory
  • peer to peer
  • database systems
  • query processing
  • flash memory
  • memory access