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A Self-Calibrated On-chip Phase-Noise-Measurement Circuit with -75dBc Single-Tone Sensitivity at 100kHz Offset.
Waleed Khalil
Bertan Bakkaloglu
Sayfe Kiaei
Published in:
ISSCC (2007)
Keyphrases
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high speed
analog vlsi
circuit design
sensitivity analysis
evolvable hardware
low cost
chip design
neural network
data acquisition
low power
high density
sampling rate
digital circuits
power dissipation