A Low-Area Multi-Link Interconnect Architecture for GALS Chip Multiprocessors.
Zhiyi YuBevan M. BaasPublished in: IEEE Trans. Very Large Scale Integr. Syst. (2010)
Keyphrases
- high speed
- multithreading
- parallel architecture
- power dissipation
- management system
- analog vlsi
- nm technology
- real time
- low cost
- low power consumption
- level parallelism
- parallel processing
- parallel implementation
- computational power
- parallel computing
- link structure
- software architecture
- vlsi implementation
- clock frequency
- network on chip