9.4 A 2×2 WLAN and Bluetooth combo SoC in 28nm CMOS with on-chip WLAN digital power amplifier, integrated 2G/BT SP3T switch and BT pulling cancelation.
Renaldi WinotoAshkan OlyaeiMohammad HajirostamWai LauXiang GaoArnab MitraOvidiu CarnuPhilip GodoyLuns TeeHao LiErdem ErdoganAlden WongQiang ZhuTimothy LooFan ZhangLiwei ShengDonghong CuiAnuranjan JhaXiang LiWanghua WuKun-Seok LeeDerek CheungKa Wo PangHaisong WangJiexi LiuXingliang ZhaoDaibashish GangopadhyayDavid CousinardArvind Anumula ParamanandamXiaoang LiNorman LiuWeiwei XuYuan FangXiaoyue WangRandy TsangLi LinPublished in: ISSCC (2016)
Keyphrases
- low power
- high power
- high speed
- mixed signal
- cmos technology
- power consumption
- silicon on insulator
- nm technology
- metal oxide semiconductor
- cmos image sensor
- low cost
- wireless local area network
- wireless networks
- dynamic range
- circuit design
- power dissipation
- wide dynamic range
- single chip
- analog vlsi
- chip design
- power reduction
- ibm power processor
- access points
- ultra low power
- wifi
- quality of service
- high density
- power management
- integrated circuit
- low voltage
- image sensor
- functional verification
- cd rom
- multi hop
- digital signal processing
- mobile phone
- ad hoc networks
- parallel processing
- mobile devices