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On the Feasibility of Cascode and Regulated Cascode Amplifier Stages in ULV Circuits Exploiting MOS Transistors in Deep Subthreshold Operation.
Riccardo Della Sala
Francesco Centurelli
Pietro MonsurrĂ²
Giuseppe Scotti
Published in:
IEEE Access (2024)
Keyphrases
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neural network
floating gate
deep learning
information systems
search algorithm
asynchronous circuits
multistage
low voltage
high power
focal plane
digital circuits
circuit design
steady state
probabilistic model
dynamic programming
artificial neural networks
case study
genetic algorithm
machine learning