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Configurable Architecture for Double/Two-Parallel Single Precision Floating Point Division.
Manish Kumar Jaiswal
Ray C. C. Cheung
M. Balakrishnan
Kolin Paul
Published in:
ISVLSI (2014)
Keyphrases
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floating point
floating point arithmetic
instruction set
fixed point
square root
level parallelism
graphics processing units
master slave
image processing
higher order
distributed systems
multi view
computer architecture