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A 10Gbps Burst-Mode CDR Circuit in 0.18μm CMOS.
Che-Fu Liang
Sy-Chyuan Hwu
Shen-Iuan Liu
Published in:
CICC (2006)
Keyphrases
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circuit design
analog vlsi
high speed
delay insensitive
cmos technology
low voltage
vlsi circuits
low power
power dissipation
chip design
digital circuits
single phase
power supply
low cost
flip flops
power consumption
neural network
analog circuits
parallel processing
semiconductor devices
real time