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A Single-Electron-Transistor Logic Gate Family and Its Application - Part II: Design and Simulation of a 7-3 Parallel Counter with Linear Summation and Multiple-Valued Latch Functions.

Hiroshi InokawaYasuo TakahashiKatsuhiko DegawaTakafumi AokiTatsuo Higuchi
Published in: ISMVL (2004)
Keyphrases
  • multiple valued
  • multi valued
  • low power
  • neural network
  • circuit design
  • expert systems
  • high speed
  • information retrieval systems
  • logic programming
  • power consumption
  • boolean functions
  • power dissipation