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Current Testing of CMOS Combinational Circuits with Single Floating Gate Defects.

Víctor H. ChampacJoan Figueras
Published in: VLSI Design (1997)
Keyphrases
  • floating gate
  • circuit design
  • logic circuits
  • high speed
  • low voltage
  • low power
  • delay insensitive
  • analog vlsi
  • asynchronous circuits
  • vlsi circuits
  • low cost