Low-power clock-deskew buffer for high-speed digital circuits.
Shen-Iuan LiuJiunn-Hwa LeeHen-Wai TsaoPublished in: IEEE J. Solid State Circuits (1999)
Keyphrases
- low power
- digital circuits
- high speed
- single chip
- power consumption
- wireless transmission
- high power
- digital signal processing
- frame rate
- real time
- data flow
- model based diagnosis
- low power consumption
- vlsi circuits
- circuit design
- logic circuits
- finite state machines
- vlsi architecture
- functional decomposition
- clock frequency
- power reduction
- mixed signal
- signal processor
- wireless networks
- low complexity
- cmos technology