Login / Signup
Design and Physical Implementation of Mixed Signal Elapsed Time Counter in 0.18 µm CMOS Technology.
Saroja V. Siddamal
Suhas B. Shirol
Shraddha Hiremath
Nalini C. Iyer
Published in:
VDAT (2019)
Keyphrases
</>
cmos technology
mixed signal
low power
multi channel
low voltage
low cost
spl times
power dissipation
power consumption
parallel processing
digital circuits
high speed
analog to digital converter
hardware and software
real time
efficient implementation
image processing