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Area-efficient and low stand-by power 1k-byte transmission-gate-based non-imprinting high-speed erase (TNIHE) SRAM.

Weng-Geng HoKyaw Zwa Lwin NeN. Prashanth SrinivasKwen-Siong ChongTony Tae-Hyoung KimBah-Hwee Gwee
Published in: ISCAS (2016)
Keyphrases
  • high speed
  • power consumption
  • low power
  • data transmission
  • neural network
  • cmos technology
  • error correcting codes