Exploiting bounds optimization for the semi-formal verification of analog circuits.

Ons Lahiouel Henda Aridhi Mohamed H. Zaki Sofiène Tahar

Published in: Integr. (2017)

Keyphrases

formal verification
analog circuits
model checking
model checker
automated verification
digital circuits
bounded model checking
lower bound
fault diagnosis
symbolic model checking
program slicing
upper bound
real time
image processing