Timing-Constrained FPGA Placement: A Force-Directed Formulation and Its Performance Evaluation.

Srilata Raman C. L. Liu Larry G. Jones

Published in: VLSI Design (1996)

Keyphrases

lagrange multipliers
real time
signal processing
quadratic programming
field programmable gate array
real time image processing
single chip
genetic algorithm
image processing
bayesian networks
low cost
high speed
probabilistic formulation