The design of low power multiple-valued logic encoder and decoder circuits.
I. ThoidisD. J. SoudrisIoannis KarafyllidisAdonios ThanailakisPublished in: ICECS (1999)
Keyphrases
- low power
- power reduction
- logic circuits
- high speed
- power dissipation
- power consumption
- cmos technology
- single chip
- mixed signal
- low cost
- vlsi architecture
- low power consumption
- low complexity
- vlsi circuits
- gate array
- digital signal processing
- multiple valued logic
- delay insensitive
- video codec
- real time
- ultra low power
- power saving
- circuit design
- design methodology
- image sequences