Login / Signup
BTI and leakage aware dynamic voltage scaling for reliable low power cache memories.
Daniele Rossi
Vasileios Tenentes
S. Saqib Khursheed
Bashir M. Al-Hashimi
Published in:
IOLTS (2015)
Keyphrases
</>
low power
power consumption
low cost
high speed
energy dissipation
single chip
high power
cmos technology
vlsi architecture
wireless transmission
vlsi circuits
gate array
image sensor
low power consumption
power saving
power reduction
delay insensitive
main memory