PATRONoC: Parallel AXI Transport Reducing Overhead for Networks-on-Chip targeting Multi-Accelerator DNN Platforms at the Edge.
Vikram JainMatheus A. CavalcanteNazareno BruschiMichael RogenmoserThomas BenzAndreas KurthDavide RossiLuca BeniniMarian VerhelstPublished in: CoRR (2023)
Keyphrases
- parallel implementation
- transport network
- high bandwidth
- social networks
- packet switched
- low cost
- edge information
- complex networks
- network on chip
- level parallelism
- edge detection
- high speed
- network structure
- parallel processing
- parallel computing
- shared memory
- computer networks
- computer architecture
- distributed memory
- edge weights
- multi core processors
- message passing interface
- analog vlsi
- compute intensive
- weighted graph
- training data