Utilization of Cache Area in On-Chip Multiprocessor.
Hitoshi OiN. RanganathanPublished in: ISHPC (1999)
Keyphrases
- multithreading
- memory subsystem
- parallel computing
- processor core
- highly efficient
- memory access
- computational power
- multiprocessor systems
- high speed
- distributed memory
- level parallelism
- single chip
- shared memory multiprocessor
- cache misses
- shared memory
- memory bandwidth
- circuit design
- highly parallel
- shared memory multiprocessors
- low cost
- embedded processors
- speculative execution
- physical design
- caching scheme
- chip design
- programmable logic
- high density
- cache management
- ibm zenterprise
- parallel algorithm
- data access