Flexible Architectures for LDPC Decoders Based on Network on Chip Paradigm.

Fabrizio Vacca Guido Masera Hazem Moussa Amer Baghdadi Michel Jézéquel

Published in: DSD (2009)

Keyphrases

network on chip
network simulator
routing algorithm
decoding algorithm
multistage
interconnection networks
multi processor
high speed
signal processing