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Hardware features of the static communication network of a parallel architecture.

Vincent NériJean-Luc BéchennecFranck CappelloDaniel Etiemble
Published in: Microprocess. Microprogramming (1993)
Keyphrases
  • communication networks
  • parallel architecture
  • hardware implementation
  • machine learning
  • image processing
  • distributed databases
  • parallel processing
  • pattern recognition
  • computational complexity
  • email
  • systolic array