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Methods for Reducing Power and Area of BDD-Based Optical Logic Circuits.

Ryosuke MatsuoJun ShiomiTohru IshiharaHidetoshi OnoderaAkihiko ShinyaMasaya Notomi
Published in: IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2019)
Keyphrases
  • image segmentation
  • pattern recognition
  • wireless networks
  • power consumption
  • efficient implementation
  • low power
  • logic circuits
  • logic synthesis