Transistor Level Synthesis for Static CMOS Combinational Circuits.
Chia-Pin R. LiuJacob A. AbrahamPublished in: Great Lakes Symposium on VLSI (1999)
Keyphrases
- high speed
- circuit design
- low power
- power dissipation
- logic circuits
- delay insensitive
- analog vlsi
- floating gate
- power consumption
- logic synthesis
- analog circuits
- vlsi circuits
- cmos technology
- low cost
- higher level
- lower level
- levels of abstraction
- real time
- texture synthesis
- program synthesis
- case study
- data sets
- chip design