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Design of Low-Voltage Power Efficient Frequency Dividers in Folded MOS Current Mode Logic.
Francesco Centurelli
Giuseppe Scotti
Alessandro Trifiletti
Gaetano Palumbo
Published in:
IEEE Trans. Circuits Syst. I Regul. Pap. (2021)
Keyphrases
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low voltage
design considerations
random access memory
chip design
design process
efficient implementation
power management
power line