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A New CMOS Topology for Low-Voltage Null Convention Logic Gates Design.
Matheus Trevisan Moreira
Michel Evandro Arendt
Ricardo Aquino Guazzelli
Ney Laert Vilar Calazans
Published in:
ASYNC (2014)
Keyphrases
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circuit design
low voltage
image sequences
logic circuits
real time
low cost
design considerations