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CMOS inverter delay model based on DC transfer curve for slow input.

Felipe S. MarranghelloAndré Inácio ReisRenato P. Ribas
Published in: ISQED (2013)
Keyphrases
  • low cost
  • high speed
  • input data
  • b spline
  • control algorithm
  • power consumption
  • low power
  • curve evolution
  • analog vlsi
  • circuit design
  • planar curves
  • power dissipation