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A 45-nm Dual-Port SRAM Utilizing Write-Assist Cells Against Simultaneous Access Disturbances.
Jui-Jen Wu
Meng-Fan Chang
Shau-Wei Lu
Robert Lo
Quincy Li
Published in:
IEEE Trans. Circuits Syst. II Express Briefs (2012)
Keyphrases
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power consumption
read write
power system
neural network
low power
access control
data transmission
cmos technology
leakage current