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A 0.8V Input Charge Pump Circuit with PVT Aware Body Bias Clock Drivers for Powering Non-Volatile Memories.
Rohan Sinha
Rajat Kulshrestha
Vinay N. D
Published in:
ICECS (2020)
Keyphrases
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high speed
duty cycle
data storage
multiple input
trade off
power consumption
file system
main memory
human body
analog circuits
flash memory
databases
input data
data management
evolutionary algorithm
case study
learning algorithm