Unified Hardware Architecture for 128-Bit Block Ciphers AES and Camellia.

Akashi Satoh Sumio Morioka

Published in: CHES (2003)

Keyphrases

block cipher
hardware architecture
s box
hardware implementation
hash functions
hardware architectures
secret key
lightweight
associative memory
field programmable gate array
application layer
xilinx virtex
graphical models
similarity search
message passing