Login / Signup
A computational digital-pixel-sensor VLSI featuring block-readout architecture for pixel-parallel rank-order filtering.
Benjamas Tongprasit
Kiyoto Ito
Tadashi Shibata
Published in:
ISCAS (3) (2005)
Keyphrases
</>
correlation coefficient
rank order
input image
image sensor
charge coupled device
image analysis
processor array
analog to digital converter