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A 40-nm 0.5-V 12.9-pJ/Access 8T SRAM Using Low-Energy Disturb Mitigation Scheme.
Shusuke Yoshimoto
Masaharu Terada
Shunsuke Okumura
Toshikazu Suzuki
Shinji Miyano
Hiroshi Kawaguchi
Masahiko Yoshimoto
Published in:
IEICE Trans. Electron. (2012)
Keyphrases
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low energy
electron microscopy
minimum energy
access control
neural network
low cost
x ray
power consumption
protein folding
cmos technology