A flexible global readout architecture for an analogue SIMD vision chip.
Piotr DudekPublished in: ISCAS (3) (2003)
Keyphrases
- processor array
- real time
- vlsi implementation
- computer vision
- analog vlsi
- vision system
- management system
- low cost
- parallel algorithm
- high speed
- massively parallel
- image processing
- level parallelism
- single instruction multiple data
- host computer
- array processor
- floating point unit
- cmos image sensor
- floating point arithmetic
- data conversion
- modular design
- instruction set
- single chip
- high density
- design methodology
- parallel implementation