An 8-bit low power DAC with re-used distributed binary cells architecture for reconfigurable transmitters.
Santanu SarkarSwapna BanerjeePublished in: Microelectron. J. (2014)
Keyphrases
- low power
- low cost
- vlsi architecture
- power consumption
- nm technology
- high speed
- cmos technology
- power reduction
- single chip
- high power
- distributed systems
- analog to digital converter
- mixed signal
- real time
- vlsi circuits
- signal processor
- peer to peer
- digital signal processing
- low power consumption
- wireless transmission
- general purpose
- logic circuits
- image sensor
- hardware and software
- dynamic reconfiguration
- power saving
- vlsi implementation
- design considerations
- non binary
- data flow
- gate array