Power estimation starategies for a low-power security processor.
Yen-Fong LeeShi-Yu HuangSheng-Yu HsuI-Ling ChenCheng-Tao ShiehJian-Cheng LinShih-Chieh ChangPublished in: ASP-DAC (2005)
Keyphrases
- low power
- power consumption
- single chip
- high speed
- high power
- gate array
- power reduction
- low cost
- power management
- power saving
- power dissipation
- energy efficiency
- logic circuits
- digital signal processing
- low power consumption
- information security
- security issues
- ultra low power
- ibm power processor
- vlsi circuits
- energy dissipation
- wireless transmission
- security requirements
- vlsi architecture
- parallel processing
- signal processor
- estimation algorithm
- security policies
- cmos technology
- rfid tags
- energy saving
- access control
- data center
- delay insensitive
- real time
- image sensor
- nm technology
- security mechanisms