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A clock boosting scheme for low voltage circuits.

Amirehsan BehradfarSaeed ZeinolabedinzadehKhosrow Hajsadeghi
Published in: ICECS (2008)
Keyphrases
  • low voltage
  • random access memory
  • cmos technology
  • high speed
  • power consumption
  • design considerations
  • power line
  • power management
  • pattern recognition
  • high resolution
  • low power
  • leakage current