Sparse Deep Neural Network Acceleration on HBM-Enabled FPGA Platform.
Abhishek Kumar JainSharan KumarAashish TripathiDinesh GaitondePublished in: HPEC (2021)
Keyphrases
- neural network
- real time
- artificial neural networks
- back propagation
- reconfigurable hardware
- high dimensional
- pattern recognition
- genetic algorithm
- sparse data
- fuzzy neural network
- neural network model
- bp neural network
- high speed
- parallel architecture
- sparse representation
- neural network is trained
- feed forward
- real time image processing
- fuzzy logic
- network model
- hardware implementation
- self organizing maps
- signal processing
- dedicated hardware
- sparse matrix
- hardware architectures
- hardware architecture
- deep learning
- compressed sensing
- field programmable gate array
- feed forward neural networks
- activation function
- training algorithm
- neural nets
- multilayer perceptron
- radial basis function
- data acquisition
- low cost