Debug architecture for the En-II system chip.

Bart Vermeulen Sjaak Bakker

Published in: IET Comput. Digit. Tech. (2007)

Keyphrases

low cost
analog vlsi
high speed
real time
level parallelism
cmos image sensor
network architecture
high density
design considerations
vlsi implementation
management system
multi processor
reconfigurable hardware
novice programmers
multithreading
network on chip
software architecture