Evaluation of differential vs. single-ended sensing and asymmetric cells in 90 nm logic technology for on-chip caches.
Yibin YeMuhammad M. KhellahDinesh SomasekharVivek DePublished in: ISCAS (2006)
Keyphrases
- cmos technology
- nm technology
- metal oxide semiconductor
- embedded dram
- rapid development
- low cost
- chip design
- silicon on insulator
- high speed
- data processing
- evaluation method
- evaluation model
- real time
- low power
- environmental information
- analog vlsi
- parallel processing
- power consumption
- cost effective
- computer systems
- sensor networks