Delay and Power Minimization in VLSI Interconnects with Spatio-Temporal Bus-Encoding Scheme.

K. S. Sainarayanan Chittarsu Raghunandan M. B. Srinivas

Published in: ISVLSI (2007)

Keyphrases

power dissipation
encoding scheme
spatio temporal
power consumption
low power
high speed
chip design
encoding schemes
digital signal processing
binary strings
genetic algorithm
cmos technology
moving objects
signal processing
low cost
image database
data structure
image sequences
twig queries
data sets