Building real-time HDTV applications in FPGAs using processors, AXI interfaces and high level synthesis tools.
Kees A. VissersStephen NeuendorfferJuanjo NogueraPublished in: DATE (2011)
Keyphrases
- real time
- high level synthesis
- parallel architecture
- high definition
- parallel algorithm
- visual interfaces
- hardware implementation
- parallel processing
- low cost
- user interface
- scheduling problem
- data flow
- parallel computing
- signal processor
- high definition television
- embedded processors
- low power
- np hard
- pairwise
- bayesian networks
- image processing