A Reliability-Aware Topology-Agnostic Test Scheme for Detecting, and Diagnosing Interconnect Shorts in On-chip Networks.
Biswajit BhowmikSantosh BiswasJatindra Kumar DekaPublished in: HPCC/SmartCity/DSS (2016)
Keyphrases
- high speed
- interconnection networks
- small world
- high bandwidth
- network design
- vlsi implementation
- fully connected
- low cost
- heterogeneous networks
- complex networks
- network structure
- physical design
- model based diagnosis
- computer networks
- network resources
- wireless networks
- test cases
- network coding
- image quality
- social networks
- differentiated services
- analog vlsi
- metro ethernet