Ziran Zhu

Publication Activity (10 Years)

Years Active: 2017-2024
Publications (10 Years): 35

Top Topics

Simulated Annealing

Memetic Algorithm

Image Compression

Global Optimization

Top Venues

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

IEEE Trans. Circuits Syst. II Express Briefs

Publications

Ziran Zhu, Yuejian Shi, Yangjie Mei, Fuheng Shen, Hong Liu, Jun Yang
High-Performance 3-D Placement Engine With Physical-Aware Incremental Partitioning. IEEE Trans. Circuits Syst. II Express Briefs 71 (3) (2024)
Biao Liu, Congyu Qiao, Ning Xu, Xin Geng, Ziran Zhu, Jun Yang
Variational Label-Correlation Enhancement for Congestion Prediction. ASPDAC (2024)
Tongda Xu, Ziran Zhu, Dailan He, Yanghao Li, Lina Guo, Yuanyuan Wang, Zhe Wang, Hongwei Qin, Yan Wang, Jingjing Liu, Ya-Qin Zhang
Idempotence and Perceptual Image Compression. CoRR (2024)
Ziran Zhu, Tongda Xu, Ling Li, Yan Wang
Noise Dimension of GAN: An Image Compression Perspective. CoRR (2024)
Ziran Zhu, Fuheng Shen, Yangjie Mei, Jianli Chen, Jun Yang
An Effective Routing Refinement Algorithm Based on Incremental Replacement and Rerouting. IEEE Trans. Circuits Syst. II Express Briefs 71 (1) (2024)
Ziran Zhu, Yangjie Mei, Kangkang Deng, Huan He, Jianli Chen, Jun Yang, Yao-Wen Chang
High-Performance Placement Engine for Modern Large-Scale FPGAs With Heterogeneity and Clock Constraints. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43 (3) (2024)
Tongda Xu, Ziran Zhu, Dailan He, Yanghao Li, Lina Guo, Yuanyuan Wang, Zhe Wang, Hongwei Qin, Yan Wang, Jingjing Liu, Ya-Qin Zhang
Idempotence and Perceptual Image Compression. ICLR (2024)
Ziran Zhu, Yilin Li, Miaodi Su, Shu Zhang, Haiyuan Su, Yifeng Xiao, Huan He, Jianli Chen, Yao-Wen Chang
Subgraph matching-based reference placement for printed circuit board designs. J. Supercomput. 80 (16) (2024)
Tongda Xu, Ziran Zhu, Dailan He, Yuanyuan Wang, Ming Sun, Ning Li, Hongwei Qin, Yan Wang, Jingjing Liu, Ya-Qin Zhang
Consistency Models Improve Diffusion Inverse Solvers. CoRR (2024)
Zijun Li, Ziran Zhu, Huan He, Jianli Chen
An effective routability-driven packing algorithm for large-scale heterogeneous FPGAs. Integr. 94 (2024)
Hao Gu, Jian Gu, Keyu Peng, Ziran Zhu, Ning Xu, Xin Geng, Jun Yang
LAMPlace: Legalization-Aided Reinforcement Learning-Based Macro Placement for Mixed-Size Designs With Preplaced Blocks. IEEE Trans. Circuits Syst. II Express Briefs 71 (8) (2024)
Chuandong Chen, Dishi Lin, Rongshan Wei, Qinghai Liu, Ziran Zhu, Jianli Chen
Efficient Global Optimization for Large Scaled Ordered Escape Routing. ASP-DAC (2023)
Biao Liu, Congyu Qiao, Ning Xu, Xin Geng, Ziran Zhu, Jun Yang
Variational Label-Correlation Enhancement for Congestion Prediction. CoRR (2023)
Qinghai Liu, Qinfei Tang, Jiarui Chen, Chuandong Chen, Ziran Zhu, Huan He, Jianli Chen, Yao-Wen Chang
Disjoint-Path and Golden-Pin Based Irregular PCB Routing with Complex Constraints. DAC (2023)
Ke Liu, Jian Gu, Hao Gu, Ziran Zhu
A Hybrid Reinforcement Learning and Genetic Algorithm for VLSI Floorplanning. ICMLC (2023)
Jianli Chen, Zhipeng Huang, Ziran Zhu, Zheng Peng, Wenxing Zhu, Yao-Wen Chang
Novel Proximal Group ADMM for Placement Considering Fogging and Proximity Effects. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (12) (2022)
Ziran Zhu, Fuheng Shen, Yangjie Mei, Zhipeng Huang, Jianli Chen, Jun Yang
A Robust Global Routing Engine with High-Accuracy Cell Movement under Advanced Constraints. ICCAD (2022)
Jianli Chen, Ziran Zhu, Longkun Guo, Yu-Wei Tseng, Yao-Wen Chang
Mixed-Cell-Height Placement With Drain-to-Drain Abutment and Region Constraints. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (4) (2022)
Xiqiong Bai, Ziran Zhu, Pingping Li, Jianli Chen, Tingshen Lan, Xingquan Li, Jun Yu, Wenxing Zhu, Yao-Wen Chang
Timing-Aware Fill Insertions With Design-Rule and Density Constraints. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (10) (2022)
Miaodi Su, Yifeng Xiao, Shu Zhang, Haiyuan Su, Jiacen Xu, Huan He, Ziran Zhu, Jianli Chen, Yao-Wen Chang
Subgraph matching based reference placement for PCB designs: late breaking results. DAC (2022)
Ziran Zhu, Yangjie Mei, Zijun Li, Jingwen Lin, Jianli Chen, Jun Yang, Yao-Wen Chang
High-performance placement for large-scale heterogeneous FPGAs with clock constraints. DAC (2022)
Xiqiong Bai, Ziran Zhu, Peng Zou, Jianli Chen, Jun Yu, Yao-Wen Chang
Voronoi Diagram Based Heterogeneous Circuit Layout Centerline Extraction for Mask Verification. ASP-DAC (2022)
Ziran Zhu, Zhipeng Huang, Jianli Chen, Longkun Guo
Topology-Aware Bus Routing in Complex Networks of Very-Large-Scale Integration with Nonuniform Track Configurations and Obstacles. Complex. 2021 (2021)
Zhipeng Huang, Haokai Sun, Huimin Wang, Ziran Zhu, Jun Yu, Jianli Chen
Late Breaking Results: An Effective Legalization Algorithm for Heterogeneous FPGAs with Complex Constraints. DAC (2021)
Jianli Chen, Ziran Zhu, Wenxing Zhu, Yao-Wen Chang
A Robust Modulus-Based Matrix Splitting Iteration Method for Mixed-Cell-Height Circuit Legalization. ACM Trans. Design Autom. Electr. Syst. 26 (2) (2021)
Xiqiong Bai, Ziran Zhu, Peng Zou, Lichong Sun, Jianli Chen
Late Breaking Results: Heterogeneous Circuit Layout Centerline Extraction for Mask Verification. DAC (2021)
Zhipeng Huang, Zhifeng Lin, Ziran Zhu, Jianli Chen
An Improved Simulated Annealing Algorithm With Excessive Length Penalty for Fixed-Outline Floorplanning. IEEE Access 8 (2020)
Ziran Zhu, Jianli Chen, Wenxing Zhu, Yao-Wen Chang
Mixed-Cell-Height Legalization Considering Technology and Region Constraints. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (12) (2020)
Ziran Zhu, Zhipeng Huang, Peng Yang, Wenxing Zhu, Jianli Chen, Hanbin Zhou, Senhua Dong
Mixed-cell-height legalization considering complex minimum width constraints and half-row fragmentation effect. Integr. 71 (2020)
Jianli Chen, Ziran Zhu, Qinghai Liu, Yimin Zhang, Wenxing Zhu, Yao-Wen Chang
Hamiltonian Path Based Mixed-Cell-Height Legalization for Neighbor Diffusion Effect Mitigation. DAC (2020)
Ziran Zhu, Jianli Chen, Zheng Peng, Wenxing Zhu, Yao-Wen Chang
Generalized augmented lagrangian and its applications to VLSI global placement. DAC (2018)
Ziran Zhu, Xingquan Li, Yuhang Chen, Jianli Chen, Wenxing Zhu, Yao-Wen Chang
Mixed-cell-height legalization considering technology and region constraints. ICCAD (2018)
Jianli Chen, Yan Liu, Ziran Zhu, Wenxing Zhu
An adaptive hybrid memetic algorithm for thermal-aware non-slicing VLSI floorplanning. Integr. 58 (2017)
Xingquan Li, Ziran Zhu, Wenxing Zhu
Discrete Relaxation Method for Triple Patterning Lithography Layout Decomposition. IEEE Trans. Computers 66 (2) (2017)
Jianli Chen, Ziran Zhu, Wenxing Zhu, Yao-Wen Chang
Toward Optimal Legalization for Mixed-Cell-Height Circuit Designs. DAC (2017)