Zhen Liu

Publication Activity (10 Years)

Years Active: 2004-2010
Publications (10 Years): 0

Publications

David Bermingham, Zhen Liu, Xiaojun Wang
SimNP: A Flexible Platform for the Simulation of Network Processing Systems. Commun. Netw. 2 (4) (2010)
Alan Kennedy, Xiaojun Wang, Zhen Liu, Bin Liu
Ultra-high throughput string matching for Deep Packet Inspection. DATE (2010)
Zhen Liu, Alan Kennedy, Olga Ormond, Xiaojun Wang
Power-Efficient Packet Classifier for Next-Generation Routers. ERCIM News 2009 (79) (2009)
David Bermingham, Zhen Liu, Xiaojun Wang, Bin Liu
Field-Based Branch Prediction for Packet Processing Engines. ICPADS (2009)
Alan Kennedy, Zhen Liu, Xiaojun Wang, Bin Liu
Multi-Engine Packet Classification Hardware Accelerator. ICCCN (2009)
Zhen Liu, Jia Yu, Xiaojun Wang, Bin Liu, Laxmi N. Bhuyan
Revisiting the Cache Effect on Multicore Multithreaded Network Processors. DSD (2008)
Alan Kennedy, Xiaojun Wang, Zhen Liu, Bin Liu
Low power architecture for high speed packet classification. ANCS (2008)
Zhen Liu, Kai Zheng, Bin Liu
Hybrid cache architecture for high-speed packet processing. IET Comput. Digit. Tech. 1 (2) (2007)
Zhen Liu, Hao Che, Kai Zheng, Shanzhen Chen, Chengchen Hu, Bin Liu
A Trace Driven Comparison of Latency Hiding Techniques for Network Processors. ICC (2006)
Chengchen Hu, Zhen Liu, Zhen Chen, Bin Liu
Fuzzy Optimization for Security Sensors Deployment in Collaborative Intrusion Detection System. FSKD (2006)
Kai Zheng, Zhen Liu, Bin Liu
A scalable IPv6 route lookup scheme via dynamic variable-stride bitmap compression and path compression. Comput. Commun. 29 (16) (2006)
Chengchen Hu, Bin Liu, Zhen Liu, Shifang Gao, Dapeng Wu
Optimal Deployment of Distributed Passive Measurement Monitors. ICC (2006)
Zhen Liu, Kai Zheng, Bin Liu
Hybrid Cache Architecture for High Speed Packet Processing. Hot Interconnects (2005)
Kai Zheng, Zhen Liu, Bin Liu
High Performance Embedded Route Lookup Coprocessor for Network Processors. ICCNMC (2005)
Zhen Liu, Kai Zheng, Bin Liu
A low-latency software-based route lookup implementation for network processors. ICON (2004)
Zhen Liu, Kai Zheng, Bin Liu
FPGA implementation of hierarchical memory architecture for network processors. FPT (2004)