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Yuequan Liu
Publication Activity (10 Years)
Years Active: 2015-2017
Publications (10 Years): 2
Top Topics
Data Distribution
Data Quality
Power Dissipation
Clock Gating
Top Venues
ASICON
ISCAS
Int. J. Circuit Theory Appl.
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Publications
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Yuan Wang
,
Yuequan Liu
,
Song Jia
,
Xing Zhang
Delay-locked loop based clock and data recovery with wide operating range and low jitter in a 65-nm CMOS process.
Int. J. Circuit Theory Appl.
45 (6) (2017)
Yuan Wang
,
Yuequan Liu
,
Mengyin Jiang
,
Song Jia
,
Xing Zhang
Delay-locked loop based frequency quadrupler with wide operating range and fast locking characteristics.
ISCAS
(2016)
Yuequan Liu
,
Yuan Wang
,
Song Jia
,
Xing Zhang
180.5Mbps-8Gbps DLL-based clock and data recovery circuit with low jitter performance.
ISCAS
(2015)
Mengyin Jiang
,
Yuan Wang
,
Baoguang Liu
,
Yuequan Liu
,
Song Jia
,
Xing Zhang
A reference-less all-digital burst-mode CDR with embedded TDC.
ASICON
(2015)
Fangyuan Dang
,
Yuan Wang
,
Yuequan Liu
,
Song Jia
,
Xing Zhang
Design on multi-bit adder using sense amplifier-based pass transistor logic for near-threshold voltage operation.
ASICON
(2015)