Yang Zhang

Publication Activity (10 Years)

Years Active: 2017-2021
Publications (10 Years): 12

Top Topics

Energy Efficient

Top Venues

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

ISPA/IUCC/BDCloud/SocialCom/SustainCom

Future Gener. Comput. Syst.

Publications

Chengning Wang, Dan Feng, Wei Tong, Jingning Liu, Bing Wu, Wei Zhao, Yang Zhang, Yiran Chen
Improving Write Performance on Cross-Point RRAM Arrays by Leveraging Multidimensional Non-Uniformity of Cell Effective Voltage. IEEE Trans. Computers 70 (4) (2021)
Chengning Wang, Dan Feng, Wei Tong, Yu Hua, Jingning Liu, Bing Wu, Wei Zhao, Linghao Song, Yang Zhang, Jie Xu, Xueliang Wei, Yiran Chen
Improving Multilevel Writes on Vertical 3-D Cross-Point Resistive Memory. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40 (4) (2021)
Yang Zhang, Zhibin Yu, Liang Gu, Chengning Wang, Dan Feng
EnTiered-ReRAM: An Enhanced Low Latency and Energy Efficient TLC Crossbar ReRAM Architecture. IEEE Access 9 (2021)
Bing Wu, Dan Feng, Wei Tong, Jingning Liu, Chengning Wang, Wei Zhao, Yang Zhang
A Low Power Reconfigurable Memory Architecture for Complementary Resistive Switches. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (9) (2020)
Yang Zhang, Dan Feng, Wei Tong, Jingning Liu, Chengning Wang, Jie Xu
Tiered-ReRAM: A Low Latency and Energy Efficient TLC Crossbar ReRAM Architecture. MSST (2019)
Gaoxiang Xu, Zhipeng Tan, Dan Feng, Laurence T. Yang, Wei Zhou, Xinyan Zhang, Yang Zhang, Jie Xu
FvRS: Efficiently identifying performance-critical data for improving performance of big data processing. Future Gener. Comput. Syst. 91 (2019)
Chengning Wang, Dan Feng, Wei Tong, Jingning Liu, Zheng Li, Jiayi Chang, Yang Zhang, Bing Wu, Jie Xu, Wei Zhao, Yilin Li, Ruoxi Ren
Cross-point Resistive Memory: Nonideal Properties and Solutions. ACM Trans. Design Autom. Electr. Syst. 24 (4) (2019)
Yang Zhang, Dan Feng, Wei Tong, Yu Hua, Jingning Liu, Zhipeng Tan, Chengning Wang, Bing Wu, Zheng Li, Gaoxiang Xu
CACF: A Novel Circuit Architecture Co-optimization Framework for Improving Performance, Reliability and Energy of ReRAM-based Main Memory System. ACM Trans. Archit. Code Optim. 15 (2) (2018)
Yang Zhang, Dan Feng, Zhipeng Tan, Jingning Liu, Wei Tong, Chengning Wang
Asymmetric-ReRAM: A Low Latency and High Reliability Crossbar Resistive Memory Architecture. ISPA/IUCC/BDCloud/SocialCom/SustainCom (2018)
Bing Wu, Dan Feng, Wei Tong, Jingning Liu, Shuai Li, Mingshun Yang, Chengning Wang, Yang Zhang
Aliens: a novel hybrid architecture for resistive random-access memory. ICCAD (2018)
Yang Zhang, Dan Feng, Jingning Liu, Wei Tong, Bing Wu, Caihua Fang
A Novel ReRAM-based Main Memory Structure for Optimizing Access Latency and Reliability. DAC (2017)
Chengning Wang, Dan Feng, Jingning Liu, Wei Tong, Bing Wu, Yang Zhang
DAWS: Exploiting Crossbar Characteristics for Improving Write Performance of High Density Resistive Memory. ICCD (2017)